Design Engineer

We are looking for a VHDL Design Engineer to design, implement, and verify FPGA designs using VHDL. Key Tasks

• Design, develop, and simulate FPGA designs in VHDL
• Take mission requirements and translate down to FPGA implementation
• Perform simulation, synthesis and timing analysis to verify functionality and performance
• Create testbenches for functional verification
• Generation of appropriate design documentation
• Work closely in a core project team.
• Responsible for the delivery of all aspects of the defined/delegated package of work which includes, Technical Solution, Budget and Schedule.

• Several years experience of FPGA design

• Experience of system level debug and test Knowledge & Skills

• Knowledge of FPGA design in VHDL

• Knowledge of Lab Test Equipment

• Excellent communication skills

• Commitment to deliver to challenging schedules

• Good inter-personal skills

• Organised approach

• Good planning skills

• Highly competitive Salary.
• Flexible working policies.
• 32 days annual leave + BH.
• Annual Company Bonus Scheme.
• Up to 8% employer pension contribution.
• Life Assurance (6X salary).
• Private Health Care.
• Enhanced Maternity & Paternity leave.
• Multiple Discount, Memberships schemes.