Hardware Design Engineer

Eu Recruit
2 days ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English
Experience level
Senior

Job location

Tech stack

C++
Communications Protocols
Computer Engineering
Hardware Design
Python
PCI Express
Performance Tuning
Reduced Instruction Set Computing
SystemC
SystemVerilog
Verilog
Scripting (Bash/Python/Go/Ruby)

Job description

The role involves designing and developing hardware components, ensuring their quality and on-time delivery. You will work closely with design and verification teams on the development of highly configurable network-on-chip (NoC) systems. You will also contribute to technical discussions with application engineering teams and customers., * Design and develop hardware blocks for configurable IP, including RTL coding and performance optimization.

  • Contribute to the architecture specifications of NoC components.
  • Develop and maintain verification environments to ensure design quality.
  • Work with verification teams to achieve functional coverage targets.
  • Collaborate closely with hardware and software teams to ensure proper component integration.
  • Participate in the continuous improvement of design and verification methodologies.
  • Contribute to technical discussions with customers and the application engineering team.
  • Document the design and track the progress of your developments.

Requirements

  • 5-8 years of experience in SoC/IP/NoC design
  • Strong knowledge of coherent and non-coherent communication protocols such as:
  • AMBA
  • AXI
  • ACE
  • PCIe
  • CXL
  • CHI
  • or similar
  • Good understanding of CPU architectures (ARM or RISC-V) and cache systems
  • Practical experience with the SoC/IP design flow, including:
  • Specification
  • Architecture
  • RTL coding
  • Verification
  • Synthesis
  • timing constraints
  • power constraints
  • Strong problem-solving, communication, and teamwork skills
  • Proficiency in Verilog/SystemVerilog and simulation tools such as:
  • Cadence
  • Synopsys
  • Mentor
  • Experience with SystemC, C++, Python, or scripting languages is a plus
  • Fluent English, both written and spoken

Education Requirements Master's degree (Bac+5) in electronic engineering, computer engineering, or equivalent.

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