Digital ASIC Design Engineer

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Edinburgh, United Kingdom
2 days ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English
Experience level
Intermediate

Job location

Edinburgh, United Kingdom

Tech stack

Adobe InDesign
Boolean Algebra
Code Review
Computer Engineering
Microarchitecture
Software Debugging
Logic Synthesis of Circuits
Perl
Formal Verification
Field-Programmable Gate Array (FPGA)
Hardware Description Language
Hardware Design
Python
SystemVerilog
Tcl (Programming Language)
Verilog
VHDL
Scripting (Bash/Python/Go/Ruby)
Application Specific Integrated Circuits
Physical Design

Job description

I am seeking a passionate and motivated Digital Design Engineer to join an established hardware development team. This is an excellent opportunity to work on cutting-edge digital and mixed-signal designs while learning from experienced engineers in a highly collaborative and innovative environment.You will contribute to the definition and implementation of complex ASIC systems and gain hands-on experience with industry-standard tools, methodologies, and design flows.Responsibilities

  • Interpret high-level requirements and develop detailed micro-architecture specifications for digital control and data-path systems
  • Design and implement synthesisable RTL in SystemVerilog for ASIC digital blocks, meeting functional, timing, power, and area constraints
  • Produce clear, comprehensive design documentation and actively participate in design and code reviews
  • Collaborate closely with digital design, analogue, physical design, verification, and DFT teams to ensure smooth integration and successful sign-off
  • Ensure high-quality deliverables using industry-standard sign-off methodologies, including LINT, CDC, and formal verification checks
  • Develop and execute simulations, perform debug, and resolve functional and integration issues
  • Apply digital design best practices and contribute to continuous process improvement

Requirements

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
  • 2+ years of experience in digital ASIC or FPGA design
  • Solid understanding of digital logic design principles and development flows
  • Experience with HDL languages (e.g., SystemVerilog, Verilog, or VHDL) and simulation tools
  • Exposure to scripting languages such as Python, Perl, or Tcl is advantageous
  • Strong analytical and problem-solving skills

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