ASIC Architect

• Define architectures for high-performance networking ASICs
• Translate system goals into scalable architecture plans
• Drive queuing, memory, and scheduling strategies
• Model and evaluate performance trade-offs
• Collaborate across RTL, verification, and firmware teams
• Oversee integration of high-speed I/O and memory interfaces
• Support post-silicon bring-up and debug, Keywords: ASIC Architect, networking ASIC, switch architecture, system-level architecture, high-throughput systems, queueing, scheduling, memory management, high-speed datapaths, microarchitecture, performance modeling, interface integration, PCIe, SerDes, RTL collaboration, post-silicon validation, MSEE, AI infrastructure, semiconductor design, datapath architecture, parallel processing, hardware startup, AI data center, latency optimization, power efficiency, architectural trade-offs, cross-functional teams, hardware debugging, silicon bring-up, behavioral modeling

• MSEE or equivalent with 10+ years in semiconductors; 5-7 years in ASIC architecture
• Background in CPUs, GPUs, DPUs, or switches
• Strong problem-solving and architecture methodology skills
• Experience with queueing, memory, and scheduling in high-throughput systems
• Familiar with scalable memory, crossbars, and high-speed datapaths
• Bonus: knowledge of networking protocols
• Excellent communication and documentation skills, ASIC (Application Specific Integrated Circuit), Architectural Services, Artificial Intelligence (AI), CPU (Central Processing Unit), Communication Skills, Computer Firmware, Computer Networks, Datapath Design, Debugging Skills, Documentation, GPU (Graphics Processing Unit), High Speed I/O, Memory Hardware, Network Operations Center, Network Protocols, Performance Modeling, Problem Solving Skills, RTL Verification, Silicon Bringup, Startup, Switching Architecture, Systems Scalability

• $270,000-$290,000
• Comprehensive Benefits: Health, Vision, Dental, PTO, Paid Holiday, Sick Leave if Required by Law

Piper Companies is hiring an ASIC Architect with a small start up based in Saratoga, CA. The ASIC Architect will drive the architectural definition of next-generation data center networking ASICs-shaping switch architectures, performance frameworks, and high-efficiency data paths tailored for AI training and inference. The ASIC Architect will need to sit on site in Saratoga, CA 5 days per week.