ELECTRONIC FPGA ENGINEER - HUBER+SUHNER

analysis; achieve timing closure and generate production-ready bitstreams.Contribute to requirements capture, architecture design, module specifications, and DFT/DFM considerations for FPGA-based systems.Maintain configuration management (SVN), branching/release processes, and traceability to requirements.Produce and maintain technical documentation: design descriptions, registers/interfaces, test procedures, and change logs.Participate in design and code reviews, support system integration, and assist production/field teams with issue triage.Support continuous improvement of FPGA design flows, test coverage, and automation (e.g., Tcl/Python scripts).Your profileDegree or equivalent experience in Electronic/Electrical Engineering, Computer Engineering, or related discipline.Strong hands-on experience with VHDL for FPGA design and verification.Proven experience targeting Xilinx Artix-7 families; confident using Vivado (project setup, constraints, synthesis, place & route, timing closure, bitstream generation).Ability to design deterministic finite state machines (FSMs) for control/driver logic.Experience implementing and validating low-level embedded interfaces: I²C, SPI, UART (desirable), including bus arbitration, timing, and protocol edge cases.Competence in writing self-checking test benches and performing simulation (e.g., using Vivado simulator).Experience testing on hardware: bringing up boards, using logic analysers/oscilloscopes, debugging timing/constraint issues, and validating firmware in-system.Understanding of timing constraints (XDC), clock domain crossing (CDC), metastability, resets, and synchronous design best practices.Familiarity with version control (e.g., SVN). #J-18808-Ljbffr