Digital Verification Engineer

Ro61 Nxp Semiconductors Romania Srl
Glasgow, UK
1 day ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Job source

Tech stack

Code Coverage Digital Electronics Formal Verification SystemVerilog Strategies of Testing

Job description

  • Verification of digital hardware architectures.
  • Creating, reviewing, and maintaining verification plans, and tracking verification progress.
  • Specifying and developing verification strategies, tests, and environments for security features and hardware co-processors.
  • Working with emerging verification methodologies and introducing them into existing verification flows.

Requirements

  • BSc., or MSc., degree in Electronics or Electrical Engineering.
  • Strong hands-on experience with SystemVerilog for testbench development and verification.
  • Proven expertise in UVM (Universal Verification Methodology), including component creation, sequences, drivers, monitors, and scoreboards.
  • Solid understanding and practical use of Constrained Random Verification techniques.
  • Experience with Metrics-Driven Verification, including functional coverage and verification planning.
  • Ability to write SystemVerilog Assertions (SVA) for protocol and design checking.
  • Demonstrated success in achieving Coverage Closure across functional and code coverage metrics.
  • Experience analysing coverage results and refining test strategies to close gaps.
  • Strong debugging skills across simulations and complex verification environments.
  • Knowledge of Formal Verification methods would be advantageous.

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