HRS2026/458 TFM on Advanced Circuits based on CMOS technology
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Job description
Organisation/Company UNIVERSIDAD POLITECNICA DE MADRID Department HRS4R Research Field Engineering » Electronic engineering Researcher Profile First Stage Researcher (R1) Positions Bachelor Positions Application Deadline 16 Nov 2026 - 23:00 (Europe/Madrid) Country Spain Type of Contract Temporary Job Status Part-time Hours Per Week 16 Offer Starting Date 30 Oct 2026 Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the Job related to staff position within a Research Infrastructure? No
Offer Description
- CMOS circuit design.
- Validation, verification and testing of circuits.
Requirements
Research Field Engineering Education Level Bachelor Degree or equivalent
Research Field Computer science Education Level Bachelor Degree or equivalent
Skills/Qualifications
Master’s degree students in Electrical and Electronic Engineering, Telecommunications, or similar subjects.
Specific Requirements
- Background on design of CMOS circuits.
- Valuable Knowledge of comercial design tools like Cadence / Synopsys.
- Competence in computer architectures and digital system design with HDLs (Verilog or VHDL).
Currently, pursuing a master’s degree with specific content on electronic design, the work can be used as Master thesis at the end of the 2026-2027 academic year.
Languages ENGLISH Level Excellent
Languages SPANISH Level Excellent
Research Field Other Years of Research Experience 1 - 4
Additional Information
The contracted researcher will participate in a joint program with INDRA, an international Spanish-based company, within the project “Chair UPM-INDRA in microelectronics”.
Selection process
- Academic records at bachelor’s level.
- Previous experience in the design of electronic circuits.
- Level of compliance with the specific requirements.
Work Location(s)
Number of offers available 1 Company/Institute Information Processing and Telecommunication Center (IPTC) Country Spain State/Province Madrid City Madrid Postal Code 28040 Street Avenida Complutense, 30 Geofield
Requirements
Research Field Engineering Education Level Bachelor Degree or equivalent
Research Field Computer science Education Level Bachelor Degree or equivalent, Master’s degree students in Electrical and Electronic Engineering, Telecommunications, or similar subjects.
Specific Requirements
- Background on design of CMOS circuits.
- Valuable Knowledge of comercial design tools like Cadence / Synopsys.
- Competence in computer architectures and digital system design with HDLs (Verilog or VHDL).
Currently, pursuing a master’s degree with specific content on electronic design, the work can be used as Master thesis at the end of the 2026-2027 academic year.
Languages ENGLISH Level Excellent
Languages SPANISH Level Excellent
Research Field Other Years of Research Experience 1 - 4, * Academic records at bachelor’s level.
- Previous experience in the design of electronic circuits.
- Level of compliance with the specific requirements.
Work Location(s)
Number of offers available 1 Company/Institute Information Processing and Telecommunication Center (IPTC) Country Spain State/Province Madrid City Madrid Postal Code 28040 Street Avenida Complutense, 30 Geofield
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