Job offer

Universidad Politécnica de Madrid
Madrid, Spain
10 days ago
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Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Experience required
1 year minimum
Compensation
€25,933.0
Working hours
Regular working hours
Languages
English

Tech stack

C++ (Programming Language) Computer Engineering Digital Technology Fault Tolerance Hardware Description Language Reduced Instruction Set Computing Verilog VHSIC Hardware Description Language (VHDL) Information Technology

Requirements

Master Degree or equivalent

Research Field Computer science

Education Level Master Degree or equivalent

Skills/Qualifications

Master degree on Electrical and Electronics Engineering, Telecommunication, Computer Engineering, Computer Science, or similar. Exceptional candidates who have completed a bachelor passed all master’s subjects, and are only pending the defense of their master’s thesis will also be considered. Specific Requirements

  • Competence on computer architectures and digital system design with HDLs (Verilog or VHDL).
  • Notion on RISC-V ISA and the integration of custom accelerators. Embedded systems programming with C/C++
  • Desirable knowledge on fault-tolerance in electronic systems.

Languages ENGLISH, Adaptation of the educational level: 25%

  • Experience in the field of the proposed tasks: 25%
  • Adequacy to the specific requirements: 25%
  • Experience in Research and Motivation: 25% Additional comments

Benefits & conditions

The contract includes a gross salary of 25933,05 €, and full social benefits in Spain. The salary level is competitive for the current situation in Madrid. Conference, summer school and workshop registration fees will be also covered Selection process

Se tendrán en cuenta los siguientes criterios de selección:

  • Adecuación del nivel formativo: 25%
  • Experiencia en el ámbito de las tareas propuestas: 25%
  • Adecuación a los requisitos específicos: 25%
  • Experiencia en investigación y motivación: 25%

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