SATCOM ASIC / FPGA Senior Engineer

Time To Talent Selecciona
7 days ago

Role details

Contract type
Permanent contract
Employment type
Full-time (> 32 hours)
Working hours
Regular working hours
Languages
English, Spanish
Experience level
Senior

Job location

Tech stack

Systems Engineering
Computer Engineering
Data Transmissions
Logic Synthesis of Circuits
Digital Technology
Ethernet
Field-Programmable Gate Array (FPGA)
Python
PCI Express
Satcom
Signal Processing
Verification and Validation (Software)
Static Timing Analysis
SystemVerilog
Tcl (Programming Language)
Verilog
VHDL
Vivado
Scripting (Bash/Python/Go/Ruby)
Application Specific Integrated Circuits
ModelSim
Backend

Job description

SATCOM ASIC / FPGA Senior Engineer Location: Madrid (Hybrid / Remote flexibility within the EU) Sector: Aerospace, Defense & Advanced Communications ABOUT THE ROLE We are seeking a Senior ASIC/FPGA Engineer to join our Digital Design team, developing high-performance hardware for satellite communication (SATCOM) and aerospace systems. You will be involved in the full lifecycle - from specification and architecture definition to implementation, verification, and validation. This is a hands-on technical role for engineers who enjoy working closely with the product, with autonomy and a real impact on system performance. MAIN RESPONSIBILITIES · Design and develop FPGA and ASIC solutions for digital communication and signal processing subsystems. · Define architectures and microarchitectures for high-speed, low-power designs. · Implement RTL (VHDL / Verilog / SystemVerilog) and drive synthesis, place & route, and timing closure. · Perform verification and validation at module and

Requirements

system level (simulation, lab testing, and hardware-in-the-loop). · Contribute to design reviews, documentation, and interface definitions with hardware, RF, and software teams. · Support prototype bring-up, troubleshooting, and optimization in collaboration with test and systems engineers. · Stay updated on FPGA and ASIC technologies, proposing improvements and innovations in the design flow. REQUIREMENTS · Degree in Electrical Engineering, Telecommunications, Computer Engineering, or equivalent. · 5+ years of professional experience in FPGA or ASIC design for digital systems. · Proven experience with VHDL or Verilog, synthesis tools, and timing analysis. · Knowledge of digital communication systems (modulation, coding, DSP, etc.). · Familiarity with simulation and verification tools (Modelsim, QuestaSim, Vivado, or similar). · Ability to read and understand system-level requirements and translate them into hardware architecture. · Good communication skills in English, Spanish, or other EU languages are a plus DESIRABLE SKILLS · Experience in SATCOM, aerospace, or other high-reliability environments. · Exposure to ASIC design flow (front-end or back-end) and IP integration. · Familiarity with scripting (Python, TCL) for automation and verification. · Understanding of high-speed interfaces (SERDES, JESD204, Ethernet, PCIe). · Experience with lab equipment for FPGA bring-up and validation. WHAT WE OFFER · Opportunity to work on advanced FPGA/ASIC solutions for next-generation satellite communication systems. · Collaborative international environment with exposure to cutting-edge projects. · Flexible hybrid model and strong work-life balance culture. · Ongoing professional development and training. · Competitive salary and benefits package according to experience. Requirements: - MSc in Electronics / Telecommunications Engineering. - 7+ years in space communication systems. - Strong background in RF design, active antennas, and phased arrays. - Experience with space environments, RF simulation tools, and testing. - Advanced analytical and problem-solving skills. - Fluent in English & Spanish. - EU work eligibility.

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