Verification Team Lead
Eu Recruit
Amsterdam, Netherlands
31 days ago
Role details
Contract type
Permanent contract Employment type
Part-time (≤ 32 hours) Working hours
Regular working hours Languages
English, Greek Experience level
SeniorJob location
Amsterdam, Netherlands
Tech stack
Logic Synthesis of Circuits
Perl
Tcl (Programming Language)
Scripting (Bash/Python/Go/Ruby)
Job description
We are seeking a highly experienced, hands-on Verification Team Lead with strong technical expertise and leadership capabilities. In this role, you will guide a team of digital verification engineers responsible for ensuring the functional correctness and performance of integrated circuits and subsystem building blocks. You will oversee verification strategy, execution, team performance, and quality improvements across projects., * Lead and actively manage the verification team to achieve project targets related to cost, schedule, and technical performance.
- Own verification quality, delivery timelines, and reporting to project management.
- Coordinate day-to-day team activities and allocate tasks effectively.
- Conduct performance management, coaching, and career development for team members.
- Organize, participate in, and provide guidance during verification reviews and result assessments.
- Develop project work plans, schedules, and verification progress reports.
- Mentor and train engineers in digital verification methodologies and best practices.
- Create comprehensive verification plans based on design specifications.
- Review design specifications and provide feedback to improve clarity, completeness, and verifiability.
- Ensure design correctness through appropriate verification techniques, including simulation, formal methods, and coverage-driven approaches.
- Architect and implement verification environments, including hardware/software partitioning and functional decomposition.
- Develop and optimize verification components with a focus on reusability, performance, and usability.
- Identify improvements that streamline verification workflows or enhance overall design robustness.
- Evaluate make/buy options and select external solutions when more efficient than internal development.
- Participate in design reviews and provide verification-focused input.
Requirements
- 10+ years of experience in digital verification
- 10+ years of experience with UVM and advanced verification methodologies
- Intermediate-level digital design skills
- Strong knowledge of functional verification, assertion-based verification (ABV), formal verification, UVM, FPGA-based verification, and regression frameworks
- Experience with Cadence Xcelium, eManager/vManager, Verilog, VHDL, and SystemVerilog
- Demonstrated ability to independently architect a UVM testbench from initial specification through final verification reporting
- Experience or familiarity with wireless connectivity technologies (Wi-Fi, Bluetooth, Cellular) is an advantage
- Proven ability to propose innovative, high-quality technical solutions
- Excellent English communication skills (written and verbal)
- Strong interpersonal and customer-focused mindset
- Ability to persuade and influence based on solid technical reasoning
- Team-oriented, supportive, and proactive attitude
- Capable of setting, managing, and achieving goals and deadlines for self and team
- Exposure to software, digital radio, and analog-related projects
Preferred Skills
- Scripting experience with Tcl, Make, Perl
- Proficiency in Greek (written and spoken)
- Awareness of industry-leading and competitive verification solutions
- Advanced digital design skills with 4+ years of practice
- Experience in mixed-signal verification