Design Verification Engineer (Digital Design)

Empfehlungsbund And Mintsax
Dresden, Germany
18 days ago
Apply on www.mintsax.de
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Role details

Contract type
Permanent contract
Employment type
Part-time (≤ 32 hours)
Experience level
Expert
Experience required
5 years minimum
Compensation
€58,000.0 - €70,000.0
Working hours
Shift work
Languages
English
Job source

Tech stack

Systems Engineering Automation of Tests Boolean Algebra C++ (Programming Language) Code Coverage Software Documentation Computer Programming Computer Engineering Software Debugging Digital Arts Logic Synthesis of Circuits Perl (Programming Language)
+19 more
Firmware Formal Verification Field-Programmable Gate Array (FPGA) Python (Programming Language) MATLAB Regression Analysis Regression Testing Reduced Instruction Set Computing SystemC SystemVerilog Tcl (Programming Language) Test Data Test Execution Engine Verilog Application Specific Integrated Circuits State Machines Information Technology Code Inspection Software Version Control

Job description

We are looking for an experienced Design Verification professional to join our digital design team and work with us on the development of modern ASIC and SoC systems. In this role, you will develop and maintain verification plans, test benches, and automated tests for digital design blocks, subsystems, and SoC integrations-from requirements analysis through RTL and netlist verification to support during validation., * Developing and maintaining verification plans based on use cases, functional requirements, and technical specifications in close collaboration with Digital Design, Analog/RF Design, Firmware, and System Engineering.

  • Translating system, architecture, and block requirements into test scenarios, corner cases, assertions, checkers, and coverage targets.
  • Reviewing specifications for completeness, consistency, clarity, and verifiability, as well as identifying missing requirements and undefined edge cases.
  • Design and implementation of simulation-based verification environments for RTL as well as for digital and mixed-signal interfaces.
  • Development of directed tests, constrained random tests, and regression tests using SystemVerilog, Python, cocotb, and C.
  • Verification at the block and top-level in simulation and on FPGAs, as well as performing pre-tape-out netlist and SDF verification.
  • Support for the verification of a multicore system based on the RISC-V architecture, including low- and high-speed peripherals, security functions, clock-domain crossings, power management, and low-power consumption requirements.
  • Verification of the interaction between digital logic and analog/RF or mixed-signal blocks using appropriate behavioral models, particularly with regard to data formats, sampling relationships, quantization, saturation, latencies, and calibration procedures.
  • Analysis of simulation results, waveforms, logs, assertions, transactions, and test data, as well as systematic identification of the causes of errors in the design, testbench, model, specification, or test environment.
  • Documentation, technical evaluation, and tracking of defects in close collaboration with the digital design team.
  • Analysis, improvement, and reporting of functional coverage and code coverage.
  • Verification of RTL and netlists, as well as support for post-silicon validation, if required by the respective project.
  • Maintenance of automated regression flows, CI-based test execution, and the associated reporting.
  • Maintaining verification plans, test specifications, regression results, coverage reports, and defect documentation.
  • Continuous improvement of verification methods, reusable components, review practices, and documentation standards.

Requirements

  • A bachelor’s or master’s degree in electrical engineering, telecommunications engineering, microelectronics, computer engineering, computer science, or a comparable qualification.
  • Several years of practical experience in digital design verification, ASIC/SoC verification, FPGA verification, or a comparable hardware verification field; typically, you have at least five years of relevant professional experience.
  • A solid understanding of digital design fundamentals, particularly synchronous logic, finite-state machines, registers, memory, interfaces, timing, clocking, and reset behavior.
  • Practical experience with SystemVerilog or a comparable hardware verification language.
  • Experience in developing and maintaining verification plans, as well as in deriving test scenarios, corner cases, and acceptance criteria from technical specifications.
  • Excellent methodical debugging skills in analyzing waveforms, logs, assertions, transactions, and test results.
  • Experience with Python and cocotb, and ideally with C for test development, reference models, or test automation.
  • You can systematically reproduce technical errors, narrow down their causes, and document the results with clear technical evidence.
  • A structured, analytical, and solution-oriented approach to work, as well as a high degree of initiative and personal responsibility.
  • You enjoy working closely with digital design, analog/RF design, firmware, and system engineering teams and can communicate technical matters clearly and precisely.
  • Good written and spoken English skills for working in an international team.

Nice-to-have:

  • Experience with the verification of mixed-signal or RF interfaces, particularly ADC/DAC data paths, PLL control, clock generation, calibration, AGC, or RF control paths.
  • Experience with behavioral modeling, such as SystemVerilog Real Number Modeling, Verilog-AMS, SystemC, MATLAB/Simulink, or comparable approaches.
  • Experience with
  • assertions, functional coverage, code coverage, linting, CDC/RDC analysis, formal verification, or equivalence checking.
  • ASIC design flows, FPGA prototyping, emulation, tape-out preparation, or silicon bring-up.
  • UPF verification and low-power design.
  • Fixed-point data paths, quantization, saturation, dynamic range, and numerical reference models.
  • the definition or verification of hardware/software interfaces, register maps, and behavior visible to firmware.
  • Simulators, waveform viewers, version control, issue trackers, CI systems, and automated regression infrastructure.
  • Knowledge of Tcl, Perl, C++, or other scripting and programming languages for test automation and regression analysis.

Benefits & conditions

Creative freedom & responsibility

  • Ample creative freedom and genuine ownership instead of micromanagement
  • Short decision-making paths and direct influence on strategic decisions
  • A tangible contribution to the success of our product and company
  • The opportunity to play a key role in a growing deep-tech company
  • Contributing to a technology that can transform the future of wireless communication, * Employer contribution toward the Deutschlandticket or DVB Jobticket in the amount of €55.10 per month
  • Alternatively, an employer contribution toward the JobRad in the amount of €54.90 per month
  • Unlimited free gym access right in the building
  • Retirement plan and disability insurance with contributions ranging from €100 to €200 per month

Flexibility & Work Environment

  • Flexible work hours with core hours from 10:00 a.m. to 3:00 p.m.
  • Hybrid work with a high degree of flexibility
  • Modern hardware and professional work equipment
  • Bright, modern office spaces in a central location in Dresden
  • Ergonomically designed workstations

Team & Culture

  • An international team with flat hierarchies and short lines of communication
  • Direct interaction with management and technical decision-makers
  • Colleagues who support one another and share knowledge
  • Lunch breaks together and regular team events
  • A corporate culture in which initiative and new ideas are expressly encouraged

Employee benefits Flexible working hoursHigh-quality technical equipmentemployee discounts through corporate benefitsPersonal feedback and development conversationsBikeleasingDiverse part-time optionsShower facilitiesdaycare supportStart-up spiritfree gymFree parkingOffer sports courses on siteJob ticketSubsidies for public transportationEmployee referral bonusDaycare subsidyTeam eventshome office optionIndividual training program30 days of annual leavePersonal feedback and development discussionsPension planFlexible working hoursErgonomic workplacesFitness studioGood public transportation connectionsBicycle leasing (Jobrad)Company pension scheme FPGA, Verilog, ASIC, Testautomatisierung, Mikroelektronik, VHDL, Fehleranalyse, NRplus, DECT, Verifikation, MINTsax.de, Empfehlungsbund

About the company

Based in Dresden, Germany - the heart of Silicon Saxony - we are a semiconductor startup for the breakthrough development of a new non-cellular 5G wireless chipset that enables secure massive IoT use cases.

Driven by a vision of a future where technology is seamlessly integrated into our daily lives, encompassing homes, industries, public spaces and healthcare, we strive to optimize resource and energy consumption while establishing global digital sovereignty. To realize this vision, we are actively developing a low-cost and ultra-low-power 5G wireless chipset based on the revolutionary NR+ non cellular private 5G standard.

As a Dresden-based semiconductor startup and member of the Empfehlungsbund, we at Last Mile Semiconductor have been committed to strengthening Dresden as a hub for business and technology since 2025. From the very beginning, SEO optimization and the high visibility of our job postings have been particularly crucial for us. The Empfehlungsbund’s approach supports us very effectively in this regard. I am constantly impressed by how this allows us to reach and attract outstanding talent from beyond the region for our company. The straightforward integration of our job postings on the career page, as well as the regular enhancements and optimizations to the applicant tracking system, also make our day-to-day recruiting and HR work noticeably easier. We also find the strong and supportive community particularly valuable: companies that recommend each other, share experiences, and want to work together to advance Dresden as a business location. This is exactly what makes recruiting and HR work fun! Last year alone, 54 recommendations led to 5 hires at our company. This result shows just how valuable a strong network can be.

Ms. Jessica Hinkelmann

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